NXP Semiconductors /MK66F18 /USBPHY /TRIM_OVERRIDE_EN_CLR

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Interpret as TRIM_OVERRIDE_EN_CLR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TRIM_DIV_SEL_OVERRIDE)TRIM_DIV_SEL_OVERRIDE 0 (TRIM_ENV_TAIL_ADJ_VD_OVERRIDE)TRIM_ENV_TAIL_ADJ_VD_OVERRIDE 0 (TRIM_TX_D_CAL_OVERRIDE)TRIM_TX_D_CAL_OVERRIDE 0 (TRIM_TX_CAL45DP_OVERRIDE)TRIM_TX_CAL45DP_OVERRIDE 0 (TRIM_TX_CAL45DM_OVERRIDE)TRIM_TX_CAL45DM_OVERRIDE 0TRIM_PLL_CTRL0_DIV_SEL 0TRIM_USB_REG_ENV_TAIL_ADJ_VD 0TRIM_USBPHY_TX_D_CAL 0TRIM_USBPHY_TX_CAL45DP 0TRIM_USBPHY_TX_CAL45DM

Description

USB PHY Trim Override Enable Register

Fields

TRIM_DIV_SEL_OVERRIDE

Override enable for PLL_DIV_SEL, when set, the register value in USBPHY_PLL_SIC[1:0] will be used.

TRIM_ENV_TAIL_ADJ_VD_OVERRIDE

Override enable for ENV_TAIL_ADJ, when set, the register value in USBPHY_DEBUG1[14:13] will be used

TRIM_TX_D_CAL_OVERRIDE

Override enable for TX_D_CAL, when set, the register value in USBPHY_TX[3:0] will be used.

TRIM_TX_CAL45DP_OVERRIDE

Override enable for TX_CAL45DP, when set, the register value in USBPHY_TX[19:16] will be used.

TRIM_TX_CAL45DM_OVERRIDE

Override enable for TX_CAL45DM, when set, the register value in USBPHY_TX[11:8] will be used.

TRIM_PLL_CTRL0_DIV_SEL

IFR value of PLL_DIV_SEL.

TRIM_USB_REG_ENV_TAIL_ADJ_VD

IFR value of ENV_TAIL_ADJ.

TRIM_USBPHY_TX_D_CAL

IFR value of TX_D_CAL.

TRIM_USBPHY_TX_CAL45DP

IFR value of TX_CAL45DP.

TRIM_USBPHY_TX_CAL45DM

IFR value of TX_CAL45DM.

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